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ASIC Silicon Validation, System Level Test & Diagnosis

OSI Engineering, Inc.

This is a Full-time position in Fort Collins, CO posted June 13, 2021.

ASIC Silicon Validation, System Level Test Diagnosis Our clientrsquos ASIC Products Division is seeking a candidate for a System level test, diagnosis and Silicon Validation. This position will be part of the DFT team supporting our key customers with system level failure diagnosis. The candidate will have hands-on experience of supporting Silicon validation System level test development and debug experience. The successful candidate will be able to help our customers perform diagnostics to help isolate the failures on the die to allow the DFT team to explore ways to address the test escapes. Responsibilities Define a plan to gather diagnostics data from the customer during their system failure debug process to enable DFT team to identify test escapes Develop thorough understanding of APD IP test characterization approaches Develop understanding of customerrsquos application, system and platform requirements to be able to lead and drive the necessary information gathering in the event of system issues caused by ASIC Act as a liaison between the customer and the ASIC team. Ability to drive discovery conversations w the customer utilizing deep technical expertise in the areas of Si validation, System level test diagnosis work experience in the industry from previous roles Define, Develop test boards in collaboration with customer to enable efficient System Level Testing (SLT) Must be able to manage projects and tasks independently with minimal supervision. Must be curious on how the systems and applications are put together. Collaborate with various teams within Broadcom to help address systemic issues showing up in multiple products Requirements System-level validation, characterization debug System-to-ATE correlation Boardsystem testing SLT Eval boardsystem (socketed functional board) System-level fault tolerance redundancy Familiarity with scan design, IJTAG, JTAG 1149.1, TDFstuck-at testing, Memory BIST, IP testing Experience with PCIE, in-system busses like APB, AXI etc. ATE wafer final test Education Bachelors in ElectricalElectronicComputer Engineering and 12+ years relevant experience or a Masters Degree in ElectricalElectronicComputer Engineering and10+ years of relevant experience Type of Role Full Time Location Fort Collins, CO San Jose, CA Remote Submit resume to mailto Keon Paulino 408.550.2800 x113 OSIJOBS